FPU Control Word Bits
---------------------

Bits 6,7,13,14,15 are reserved and not used.

Bits
EXCEPTION-FLAG MASKS 0-5
0 -> IM  Invalid Operation
1 -> DM  Denormalized Operand
2 -> ZM  Zero Divide
3 -> OM  Overflow
4 -> UM  Underflow
5 -> PM  Precision

PRECISION CONTROL FIELD
8,9 PC ->  Single Precision   (24-bit) = $00B
           Double Precision   (53-bit) = $10B
           Extended Precision (64-bit) = $11B
           Reserved                    = $01B

ROUNDING MODE
10,11 RC ->  Round to nearest even      = $00B
             Round down toward infinity = $01B
             Round up toward infinity   = $10B
             Round toward zero (trunc)  = $11B

INFINITY CONTROL
12  X ->     Infinity control. Used for compatability with 287 FPU.
             Projective = 0
             Affine     = 1

This can all be found in "Intel Architecture Software Developer's Manual
Vol I: Basic Architecture"

Also note that $133F turns off all exceptions.


Thanks to Tony Costanza for this information.